AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference

Analog in-memory computing (AIMC) has been utilized in convolutional neural networks (CNNs) edge inference engines to solve the memory bottleneck problem and increase efficiency. However, AIMC analog-to-digital converters (ADCs) restricted resolution imposes quantization of output activations that can reduce accuracy without meticulous optimization. A study conducted calibration obtained configurations with which low-resolution ADCs did not affect accuracy. The were layer-specific. Therefore, a real-time adjustment was required. is adjusted by controlling analog gain entangling it parameters nonlinear functions. dynamic control interrupting its operation an unsettled until now. This paper introduces technique for imposing from processes on through circuit setup. permits on-the-fly adjustments enabling layer-wise increases achievable network accuracies platforms. As case study, we deployed method macro artificial intelligence (AI) engine SoC platform RISC-V processor hybrid DIgital-ANAlog accelerators (DIANA). We related controllable configuration look-up table. noteworthy side benefits identifying limitations due nonlinearities design imperfections. These are investigated, advice transferable future designs provided avoid imperfections such as mismatch, bias voltage drop, interconnect delay. In addition, different levels abstraction leads guidelines facilitate during application phase.